Toggle navigation

Principal Analog Design Engineer (Memory/Audio Interface)

Job Description:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title: Principal Analog Mixed Signal Design Engineer ( Memory/Audio Interface )

Location: Cork

Reports to: Senior Design, Engineering Group Director

Job Overview:

Lead Analog and Mixed Signal design of high speed memory interface analog components used in state-of-the-art DDR memory interface PHYs in leading edge technology nodes. Consisting of blocks such as IOs, amplifiers, comparators, drivers, duty cycle correctors, PLLs, DLLs, level shifters, etc. in advanced IC nodes in volume production.

As Principal Design Engineer, you will provide technical direction and coordination to the analog IC design team and Identify opportunities to advance technology of analog design and participate in strategic internal analog IP development.

Job Responsibilities:

  • Design of High-Speed memory interface products at data rates up to and exceeding 36 Gbps on leading edge technology nodes (e.g. 5nm FinFET CMOS)
  • Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
  • Work closely with Physical Design Engineers to design IC circuit blocks and PMA sections
  • Work with Technical Team Leads in the areas of circuit design and architects
  • Mentor Junior Design Engineers when the project need arises
  • Work with global teams (US, India, China, EU), which work in different time-zones

    • Job Qualifications:

  • Successful candidate should be BEng, MEng qualified or have an equivalent qualification.
  • Minimum of 4 years of CMOS design experience, preferably in the area of CMOS SERDES, DDR or high-speed I/O IC design
  • Should have a good understanding of jitter and signal equalization techniques
  • Design experience in some of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators
  • Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment
  • Position requires proficiency in using CAD tools for circuit simulation, layout and physical verification
  • Cadence tool experience and design experience in

    • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

    Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.

    Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

    At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

    Job Title: Principal Analog Mixed Signal Design Engineer ( Memory/Audio Interface )

    Location: Cork

    Reports to: Senior Design, Engineering Group Director

    Job Overview:

    Lead Analog and Mixed Signal design of high speed memory interface analog components used in state-of-the-art DDR memory interface PHYs in leading edge technology nodes. Consisting of blocks such as IOs, amplifiers, comparators, drivers, duty cycle correctors, PLLs, DLLs, level shifters, etc. in advanced IC nodes in volume production.

    As Principal Design Engineer, you will provide technical direction and coordination to the analog IC design team and Identify opportunities to advance technology of analog design and participate in strategic internal analog IP development.

    Job Responsibilities:

  • Design of High-Speed memory interface products at data rates up to and exceeding 36 Gbps on leading edge technology nodes (e.g. 5nm FinFET CMOS)
  • Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications
  • Work closely with Physical Design Engineers to design IC circuit blocks and PMA sections
  • Work with Technical Team Leads in the areas of circuit design and architects
  • Mentor Junior Design Engineers when the project need arises
  • Work with global teams (US, India, China, EU), which work in different time-zones

    • Job Qualifications:

  • Successful candidate should be BEng, MEng qualified or have an equivalent qualification.
  • Minimum of 4 years of CMOS design experience, preferably in the area of CMOS SERDES, DDR or high-speed I/O IC design
  • Should have a good understanding of jitter and signal equalization techniques
  • Design experience in some of the following SERDES circuit blocks: Driver, Receiver, Serializer, Deserializer, Phase Interpolator, Low jitter PLL, High Speed Clock Distribution, Bias and Bandgap, Voltage Regulators
  • Excellent problem-solving skills, analog aptitude, good communication skills and ability to work cooperatively in a team environment
  • Position requires proficiency in using CAD tools for circuit simulation, layout and physical verification
  • Cadence tool experience and design experience in
    • #LI-DNI
    Get Interview Coaching

    GatedTalent consolidates jobs from a variety of sources. Users of the “Talentis” and “FileFinder” executive search CRMs are able to publish jobs to the site with links from inside their core business apps. These are supplemented by jobs added by our own researchers and those provided by a third party job aggregation service. Please note that GatedTalent staff are not directly involved in the recruiting process.

    By using our website, you agree to the use of cookies as described in our Privacy Policy.

    Recruiting Brief

    You don't have credit card details available. You will be redirected to update payment method page. Click OK to continue.